Jigarkumar Mori
Mentor
Rising Codementor
US$0.00
For every 15 mins
ABOUT ME
Image Processing & Machine Learning Enthusiast | FPGA Developer
Image Processing & Machine Learning Enthusiast | FPGA Developer
• Past experience (5+ Years) with ifm electronics & pmd technologies (German MNCs)
• Started partnership firm in Nov 2016
• Passionate about Image Processing & FPGAs
• Looking for long term partnership
• Flexible hours
• Focused area: Imaging Automation, Embedded, Healthcare, Consumer Electronics, Portable devices
• Multilingual (Gujarati, Hindi, English, Marathi, German)
• Willing to travel client location (If required)
Provide services in two major areas
- FPGA/ Hardware/ RTL Design Services
- Image Processing/ Computer Vision/ Machine Learning/ Deep Learning Services on FPGA, Embedded, Desktop, Mobile & Web Platforms
• FPGA/ Hardware/ RTL Design Services
- RTL Modelling, Synthesis, PAR & Timing Closure, IP Core Development
- Area & Timing Optimization
- FPGA Prototyping for ASIC & SoC Design
- Expertise on USB, UART, LCD, VGA, DVI, HDMI, I2C
- Languages: Verilog, VHDL, C, C++
- Synthesis and Simulation Tools: Mentor Graphics, Xilinx, Lattice
- Tools : Xilinx (ISE, EDK, SDK, Vivado, ChipScope, iMPACT, System Generator, MATLAB HDL Coder), Mentor Graphics
• Image Processing/ Computer Vision/ Machine Learning/ Deep Learning Services
- Languages: C/ C++/ Python
- Tools: OpenCV/ Anaconda/ Android Studio/ MATLAB/ Microsoft Visual Studio/ Qt
- Technology: Bio-metric (Face & Fingerprint Recognition), Stereo/ 3D Imaging, Automation, OCR, Gesture, HDR, Image Stitching (Panorama & Grid), Number Plate Recognition, Object Detection/ Segmentation/ Counting/ Tracking/ Classification, Viola Jones Haar Cascade, Tesseract, TensorFlow, CNN, SVM, HMM, HoG, LBP
English
Chennai (+05:30)
Joined June 2017
EXPERTISE
6 years experience
Image / Video Processing on FPGA, Front End Design, VHDL, Verilog, Synthesis, Simulation, PnR & Timing analysis, System Generator, Hardwa...
Image / Video Processing on FPGA, Front End Design, VHDL, Verilog, Synthesis, Simulation, PnR & Timing analysis, System Generator, Hardware Co Simulation, Hardware in Loop, Fixed Point Implementation, Xilinx FPGA, RTL Development, Xilinx & Lattice EDA Tools, MATLAB, Simulink, HDL Coder, VHDL Code Generation, Computer Vision, Machine Learning, Xilinx Spartan, Virtex, Zynq SoC, Lattice MachXO3
• Experience in VLSI design / RTL design with VHDL, Verilog
• Hands-on experience in Xilinx, Lattice, MATLAB, Mentor Graphics EDA tools
• Real time testing of FPGAs using MATLAB hardware co simulation (System Generator) & Hardware in Loop (HDL Coder)
• Experience of using real time debug tools such as ChipScope
• Experience of multiple clock domains
• Experience in Synthesis, Place & Route, Optimization and Debugging
• Experience with MATLAB, Simulink, HDL Coder, HDL Verifier, Image/Video/Signal Processing, Computer Vision toolboxes
• Design Image/Video/Signal Processing algorithms, efficient implementation on FPGA
• Image enhancement, Edge-detection algorithms, Contrast Enhancement, Image Scaling, Adaptive Median Filter, RGB2YCbCr, RGB2HSV, Bilateral Filter, High Dynamic Range Extension, Tonemap, Color Correction, Image Sharpening, VGA Controller,
• Real Time Camera Based Applications (HDR/ Panorama/ Image Stitching or Various Effect)
• Stereo Image/ 3D Image based applications
• Fixed point implementation: CORDIC (Square-root, Divider, TAN Inverse)
6 years experience
Image / Video Processing on FPGA, Front End Design, VHDL, Verilog, Synthesis, Simulation, PnR & Timing analysis, System Generator, Hardwa...
Image / Video Processing on FPGA, Front End Design, VHDL, Verilog, Synthesis, Simulation, PnR & Timing analysis, System Generator, Hardware Co Simulation, Hardware in Loop, Fixed Point Implementation, Xilinx FPGA, RTL Development, Xilinx & Lattice EDA Tools, MATLAB, Simulink, HDL Coder, VHDL Code Generation, Computer Vision, Machine Learning, Xilinx Spartan, Virtex, Zynq SoC, Lattice MachXO3
• Experience in VLSI design / RTL design with VHDL, Verilog
• Hands-on experience in Xilinx, Lattice, MATLAB, Mentor Graphics EDA tools
• Real time testing of FPGAs using MATLAB hardware co simulation (System Generator) & Hardware in Loop (HDL Coder)
• Experience of using real time debug tools such as ChipScope
• Experience of multiple clock domains
• Experience in Synthesis, Place & Route, Optimization and Debugging
• Experience with MATLAB, Simulink, HDL Coder, HDL Verifier, Image/Video/Signal Processing, Computer Vision toolboxes
• Design Image/Video/Signal Processing algorithms, efficient implementation on FPGA
• Image enhancement, Edge-detection algorithms, Contrast Enhancement, Image Scaling, Adaptive Median Filter, RGB2YCbCr, RGB2HSV, Bilateral Filter, High Dynamic Range Extension, Tonemap, Color Correction, Image Sharpening, VGA Controller,
• Real Time Camera Based Applications (HDR/ Panorama/ Image Stitching or Various Effect)
• Stereo Image/ 3D Image based applications
• Fixed point implementation: CORDIC (Square-root, Divider, TAN Inverse)
5 years experience
Image / Video Processing on FPGA, Front End Design, VHDL, Verilog, Synthesis, Simulation, PnR & Timing analysis, System Generator, Hardwa...
Image / Video Processing on FPGA, Front End Design, VHDL, Verilog, Synthesis, Simulation, PnR & Timing analysis, System Generator, Hardware Co Simulation, Hardware in Loop, Fixed Point Implementation, Xilinx FPGA, RTL Development, Xilinx & Lattice EDA Tools, MATLAB, Simulink, HDL Coder, VHDL Code Generation, Computer Vision, Machine Learning, Xilinx Spartan, Virtex, Zynq SoC, Lattice MachXO3
• Experience in VLSI design / RTL design with VHDL, Verilog
• Hands-on experience in Xilinx, Lattice, MATLAB, Mentor Graphics EDA tools
• Real time testing of FPGAs using MATLAB hardware co simulation (System Generator) & Hardware in Loop (HDL Coder)
• Experience of using real time debug tools such as ChipScope
• Experience of multiple clock domains
• Experience in Synthesis, Place & Route, Optimization and Debugging
• Experience with MATLAB, Simulink, HDL Coder, HDL Verifier, Image/Video/Signal Processing, Computer Vision toolboxes
• Design Image/Video/Signal Processing algorithms, efficient implementation on FPGA
• Image enhancement, Edge-detection algorithms, Contrast Enhancement, Image Scaling, Adaptive Median Filter, RGB2YCbCr, RGB2HSV, Bilateral Filter, High Dynamic Range Extension, Tonemap, Color Correction, Image Sharpening, VGA Controller,
• Real Time Camera Based Applications (HDR/ Panorama/ Image Stitching or Various Effect)
• Stereo Image/ 3D Image based applications
• Fixed point implementation: CORDIC (Square-root, Divider, TAN Inverse)
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