Juan Pablo Iñigo
Mentor
Rising Codementor
US$0.00
For every 15 mins
ABOUT ME
Electronic Engineer, R&D, VHDL designer
Electronic Engineer, R&D, VHDL designer
I am an electronic engineer with a lot of experience in VHDL and C programming. My expertise is the digital signal processing focused in digital communications.
Spanish, English
Buenos Aires (-03:00)
Joined January 2018
EXPERTISE
4 years experience
Experience in DSP using VHDL. Implementation of encryption and FEC algorithms.
Configuration protocols, digital control, etc.
Experience in DSP using VHDL. Implementation of encryption and FEC algorithms.
Configuration protocols, digital control, etc.
6 years experience
5 years experience
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EMPLOYMENTS
Electronic Engineer
VENG SA
2015-07-01-Present
R & D engineering. Electronic, VHDL, C, Matlab.
R & D engineering. Electronic, VHDL, C, Matlab.
Impact
FPGA
Vivado
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Impact
FPGA
Vivado
Ise
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PROJECTS
Flight Termination Receiver
2017
Development of the digital signal proccessing stage of a flight termination receiver (PCM/FM receiver).
Development of the digital signal proccessing stage of a flight termination receiver (PCM/FM receiver).
VHDL (VHSIC Hardware Description Language)
VHDL (VHSIC Hardware Description Language)