Top Senior Verilog Developers - Nov 2017
Undergraduate EE Student at the Cooper Union
I'm an undergrad student, passionate about programming and technology, and going above and beyond when presented with the chance to apply my skills in my fields of interest, especially research. I work with Linux and Java on a near-daily basis, and compete in mathematics, science, and robotics competitions as well as computing (including multiple local CS competitions, mainly around Java, and IBM Master The Mainframe).
SystemVerilog, UVM expert
- Incentive experience of architecting and implementing OVM/UVM SystemVerilog verification environments for digital design verification - Developing verification components, setting up regression systems with latest EDA tools. - Experience with an industry available Cadence Palladium emulator - Understanding of end-to-end digital design verification processes, overall verification strategy and methodology from test plan creation, through to verification closure. - Fluent in verification languages: SystemVerilog, Python, TCL - Verification methodologies: OVM, UVM
I am a man that live the present and try to use all the time doing things that I love
Image Processing & Machine Learning Enthusiast | FPGA Developer
• Past experience (5+ Years) with ifm electronics & pmd technologies (German MNCs) • Started partnership firm in Nov 2016 • Passionate about Image Processing & FPGAs • Looking for long term partnership • Flexible hours • Focused area: Imaging Automation, Embedded, Healthcare, Consumer Electronics, Portable devices • Multilingual (Gujarati, Hindi, English, Marathi, German) • Willing to travel client location (If required) Provide services in two major areas 1) FPGA/ Hardware/ RTL Design Services 2) Image Processing/ Computer Vision/ Machine Learning/ Deep Learning Services on FPGA, Embedded, Desktop, Mobile & Web Platforms • FPGA/ Hardware/ RTL Design Services - RTL Modelling, Synthesis, PAR & Timing Closure, IP Core Development - Area & Timing Optimization - FPGA Prototyping for ASIC & SoC Design - Expertise on USB, UART, LCD, VGA, DVI, HDMI, I2C - Languages: Verilog, VHDL, C, C++ - Synthesis and Simulation Tools: Mentor Graphics, Xilinx, Lattice - Tools : Xilinx (ISE, EDK, SDK, Vivado, ChipScope, iMPACT, System Generator, MATLAB HDL Coder), Mentor Graphics • Image Processing/ Computer Vision/ Machine Learning/ Deep Learning Services - Languages: C/ C++/ Python - Tools: OpenCV/ Anaconda/ Android Studio/ MATLAB/ Microsoft Visual Studio/ Qt - Technology: Bio-metric (Face & Fingerprint Recognition), Stereo/ 3D Imaging, Automation, OCR, Gesture, HDR, Image Stitching (Panorama & Grid), Number Plate Recognition, Object Detection/ Segmentation/ Counting/ Tracking/ Classification, Viola Jones Haar Cascade, Tesseract, TensorFlow, CNN, SVM, HMM, HoG, LBP
Technical lead for development studio, Mobile Flow LLC.
Hi, we are mobile developers focused on iOS, Android and custom hardware. We love working with design-forward clients, those who push the mobile state-of-the-art forward with aggressive design challenges.
I am an electronic engineer turned GNSS engineer who never stops learning about new and currently hot technologies. Academically speaking, I have experience of learning in variety of environments, from conventional classroom to complete online education. Due to some non-disclousre agreements I am obliged to follow, I cannot publicly share the projects I have been involved both in past and present. Well to give a general idea, they are related to my skillset. I am always open to explore something new and exciting. I am a staunch believer of the leap of faith.
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